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| LMV321, LMV358, LMV324 Single, Dual, Quad Low-Voltage, Rail-to-Rail Operational Amplifiers The LMV321, LMV358, and LMV324 are CMOS single, dual, and quad low voltage operational amplifiers with rail-to-rail output swing. These amplifiers are a cost-effective solution for applications where low power consumption and space saving packages are critical. Specification tables are provided for operation from power supply voltages at 2.7 V and 5 V. Rail-to-Rail operation provides improved signal-to-noise preformance. Ultra low quiescent current makes this series of amplifiers ideal for portable, battery operated equipment. The common mode input range includes ground making the device useful for low-side current-shunt measurements. The ultra small packages allow for placement on the PCB in close proximity to the signal source thereby reducing noise pickup. Features http://onsemi.com 1 5 1 TSOP-5 CASE 483 SC-70 CASE 419A Micro8] CASE 846A 8 1 SOIC-8 CASE 751 1 UDFN8 CASE 517AJ 8 1 * * * * * * * * Operation from 2.7 V to 5.0 V Single-Sided Power Supply LMV321 Single Available in Ultra Small 5 Pin SC70 Package No Output Crossover Distortion Industrial temperature Range: -40C to +85C Rail-to-Rail Output Low Quiescent Current: LMV358 Dual - 220 mA, Max per Channel No Output Phase-Reversal from Overdriven Input These are Pb-Free Devices 1 SOIC-14 CASE 751A 1 TSSOP-14 CASE 948G Typical Applications * Notebook Computers and PDA's * Portable Battery-Operated Instruments * Active Filters 120 100 80 CMRR (dB) GAIN (dB) 60 40 20 0 -20 10 Over -40C to +85C Same Gain $1.8 dB (Typ) 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 40 30 -1 60 50 80 70 ORDERING AND MARKING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. VS = 5 V 0 1 2 3 4 INPUT COMMON MODE VOLTAGE (V) 5 Figure 1. Open Loop Frequency Response (RL = 2 kW, TA = 255C, VS = 5 V) Figure 2. CMRR vs. Input Common Mode Voltage (c) Semiconductor Components Industries, LLC, 2009 August, 2009 - Rev. 8 1 Publication Order Number: LMV321/D LMV321, LMV358, LMV324 MARKING DIAGRAMS SC-70 5 AAC MG G 1 AAC = Specific Device Code M = Date Code G = Pb-Free Package (Note: Microdot may be in either location) 3AC = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) 3ACAYWG G 1 V358 = Specific Device Code A = Assembly Location Y = Year W = Work Week G = Pb-Free Package (Note: Microdot may be in either location) UDFN8 AC M G AC = Specific Device Code M = Date Code G = Pb-Free Package TSOP-5 8 V358 AYWG G Micro8 SOIC-8 8 V358 ALYWX G V358 A L Y W G 14 1 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package SOIC-14 TSSOP-14 14 LMV 324 ALYW LMV324 AWLYWWG 1 LMV324 = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb-Free Package 1 LMV324 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb-Free Package PIN CONNECTIONS SC70-5/TSOP-5 1 +IN 2 V- 3 -IN + - 5 V+ IN A- 4 IN A+ OUTPUT V- 4 2 3 B +- OUT A UDFN8/Micro8/SOIC-8 1 A -+ 8 V+ 7 OUT B 6 IN B- 5 IN B+ OUT A IN A- IN A+ V+ IN B+ IN B- OUT B 1 2 3 4 5 SOIC-14 A -+ D +- 14 OUT D 13 IN D- 12 IN D+ 11 V- 10 IN C+ 9 8 IN C- OUT C OUT A IN A- IN A+ V+ IN B+ IN B- OUT B 1 2 3 4 5 TSSOP-14 A -+ D +- 14 OUT D 13 IN D- 12 IN D+ 11 V- 10 IN C+ 9 8 IN C- OUT C (Top View) (Top View) 7 B C 7 B (Top View) (Top View) http://onsemi.com 2 -+ C +- -+ +- 6 6 LMV321, LMV358, LMV324 MAXIMUM RATINGS Symbol VS VIDR VICR tSo TJ qJA Rating Supply Voltage (Operating Range VS = 2.7 V to 5.5 V) Input Differential Voltage Input Common Mode Voltage Range Maximum Input Current Output Short Circuit (Note 1) Maximum Junction Temperature (Operating Range -40C to 85C) Thermal Resistance: SC-70 Micro8 TSOP-5 UDFN8 (1.2 mm x 1.8 mm x 0.5 mm) SOIC-8 SOIC-14 TSSOP-14 Tstg VESD Storage Temperature Mounting Temperature (Infrared or Convection -20 sec) ESD Tolerance LMV321 Machine Model Human Body Model LMV358/324 Machine Model Human Body Mode 280 238 333 350 212 156 190 -65 to 150 235 C C V 100 1000 100 2000 Value 5.5 $Supply Voltage -0.5 to (V+) + 0.5 10 Continuous 150 C C/W Unit V V V mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Continuous short-circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of 45 mA over long term may adversely affect reliability. Shorting output to either V+ or V- will adversely affect reliability. http://onsemi.com 3 LMV321, LMV358, LMV324 RL = 1 MW, V- = 0 V, VO = V+/2) Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current Input Offset Current Common Mode Rejection Ratio Power Supply Rejection Ratio Input Common-Mode Voltage Range Output Swing 2.7 V DC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 2.7 V, Symbol VIO ICVOS IB IIO CMRR PSRR VCM VOH VOL Supply Current LMV321 LMV358 (Both Amplifiers) LMV324 (4 Amplifiers) ICC Condition TA = -40C to +85C TA = -40C to +85C TA = -40C to +85C TA = -40C to +85C 0 V v VCM v 1.7 V 2.7 V v V+ v 5 V, VO = 1 V For CMRR w 50 dB RL = 10 kW to 1.35 V RL = 10 kW to 1.35 V (Note 2) 50 50 0 to 1.7 VCC - 100 Min Typ 1.7 5 <1 <1 63 60 -0.2 to 1.9 VCC - 10 60 80 140 260 180 185 340 680 Max 9 Unit mV mV/C nA nA dB dB V mV mV mA RL = 1 MW, V- = 0 V, VO = V+/2) Parameter Gain Bandwidth Product Phase Margin Gain Margin Input-Referred Voltage Noise 2.7 V AC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 2.7 V, Symbol GBWP Qm Gm en f = 50 kHz Condition CL = 200 pF Min Typ 1 60 10 50 Max Unit MHz dB nV/Hz 2. Guaranteed by design and/or characterization. http://onsemi.com 4 LMV321, LMV358, LMV324 5.0 V DC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 5.0 V, RL = 1 MW, V- = 0 V, VO = V+/2) Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Bias Current (Note 3) Input Offset Current (Note 3) Common Mode Rejection Ratio Power Supply Rejection Ratio Input Common-Mode Voltage Range Large Signal Voltage Gain (Note 3) Symbol VIO TCVIO IB TA = -40C to +85C IIO CMRR PSRR VCM AV VOH VOL VOH VOL Output Short Circuit Current Supply Current IO ICC TA = -40C to +85C 0 V v VCM v 4 V 2.7 V v V+ v 5 V, VO = 1 V, VCM = 1 V For CMRR w 50 dB RL = 2 kW TA = -40C to +85C Output Swing RL = 2 kW to 2.5 V TA = -40C to +85C RL = 2 kW to 2.5 V (Note 3) TA = -40C to +85C RL = 10 kW to 2.5 V (Note 3) TA = -40C to +85C RL = 10 kW to 2.5 V TA = -40C to +85C Sourcing = VO = 0 V (Note 3) Sinking = VO = 5 V (Note 3) LMV321 TA = -40C to +85C LMV358 Both Amplifiers TA = -40C to +85C LMV324 All Four Amplifiers TA = -40C to +85C RL = 1 MW, V- = 0 V, VO = V+/2) Parameter Slew Rate Gain Bandwidth Product Phase Margin Gain Margin Input-Referred Voltage Noise 10 10 VCC - 100 VCC - 200 65 60 160 130 210 410 250 350 440 615 830 1160 180 280 50 50 0 to 4 15 10 VCC - 300 VCC - 400 VCC - 40 120 300 400 V mV V mV mA mA <1 65 60 -0.2 to 4.2 100 nA dB dB V V/mV Condition TA = -40C to +85C TA = -40C to +85C Min Typ 1.7 5 <1 Max 9 Unit mV mV/C nA 5.0 V AC ELECTRICAL CHARACTERISTICS (Unless otherwise specified, all limits are guaranteed for TA = 25C, V+ = 5.0 V, Symbol SR GBWP Qm Gm en f = 50 kHz CL = 200 pF Condition Min Typ 1 1 60 10 50 Max Unit V/ms MHz dB nV/Hz 3. Guaranteed by design and/or characterization. http://onsemi.com 5 LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25C and VS = 5 V unless otherwise specified) 120 100 PHASE MARGIN () Over -40C to +85C Same Gain $1.8 dB (Typ) 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 80 GAIN (dB) 60 40 20 0 -20 10 170 150 130 110 90 70 50 30 10 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 3. Open Loop Frequency Response (RL = 2 kW, TA = 255C, VS = 5 V) 100 90 80 70 CMRR (dB) 50 40 30 20 10 0 10 100 1k FREQUENCY (Hz) 10k 100k CMRR (dB) 60 80 75 70 65 60 55 50 45 40 35 30 -0.5 Figure 4. Open Loop Phase Margin (RL = 2 kW, TA = 255C, VS = 5 V) VS = 2.7 V f = 10 kHz 0 0.5 1 1.5 2 2.5 3 INPUT COMMON MODE VOLTAGE (V) Figure 5. CMRR vs. Frequency (RL = 5 kW, VS = 5 V) 80 70 CMRR (dB) 60 50 40 30 -1 100 90 80 70 VS = 5 V f = 10 kHz PSRR (dB) 60 50 40 30 20 10 0 1 2 3 4 5 0 1k Figure 6. CMRR vs. Input Common Mode Voltage 10k 100k FREQUENCY (Hz) 1M 10M INPUT COMMON MODE VOLTAGE (V) Figure 7. CMRR vs. Input Common Mode Voltage http://onsemi.com 6 Figure 8. PSRR vs. Frequency (RL = 5 kW, VS = 2.7 V, +PSRR) LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25C and VS = 5 V unless otherwise specified) 90 80 70 60 PSRR (dB) 50 40 30 20 10 0 1k 10k 100k FREQUENCY (Hz) 1M 10M PSRR (dB) 100 90 80 70 60 50 40 30 20 10 0 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 9. PSRR vs. Frequency (RL = 5 kW, VS = 2.7 V, -PSRR) 100 90 80 70 PSRR (dB) VOS (mV) 60 50 40 30 20 10 0 1k 10k 100k FREQUENCY (Hz) 1M 10M 5 4.5 4 3.5 3 2.5 2 1.5 1 0.5 0 0 Figure 10. PSRR vs. Frequency (RL = 5 kW, VS = 5 V, +PSRR) VS = 2.7 V 0.5 1 1.5 VCM (V) 2 2.5 3 Figure 11. PSRR vs. Frequency (RL = 5 kW, VS = 5 V, -PSRR) 5 4.5 3.5 VOS (mV) 3 2.5 2 1.5 1 0.5 0 0 0.5 1 1.5 2 2.5 VCM (V) 3 3.5 4 4.5 5 VS = 5.0 V SUPPLY CURRENT (mA) 4 200 180 160 140 120 100 80 60 40 20 0 0 0.5 1 Figure 12. VOS vs CMR 1.5 2 2.5 3 3.5 4 4.5 5 SUPPLY VOLTAGE (V) Figure 13. VOS vs CMR Figure 14. Supply Current vs. Supply Voltage http://onsemi.com 7 LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25C and VS = 5 V unless otherwise specified) 1 VOUT REFERENCED TO V+ (V) RL = 10 kW Vout = 1 VPP Av = +1 0.1 (%) 0 -0.01 -0.02 -0.03 -0.04 -0.05 -0.06 -0.07 -0.08 -0.09 -0.1 2.5 3 3.5 4 4.5 5 Positive Swing 0.01 0.001 10 100 1k (Hz) 10k 100k SUPPLY VOLTAGE (V) Figure 15. THD+N vs Frequency 0.1 VOUT REFERENCED TO V- (V) 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 2.5 3 Negative Swing 3.5 4 SUPPLY VOLTAGE (V) 4.5 5 SINK CURRENT (mA) 0 -20 -40 -60 -80 -100 -120 -140 -160 0 Figure 16. Output Voltage Swing vs Supply Voltage (RL = 10k) 0.5 1 1.5 2 2.5 Figure 17. Output Voltage Swing vs Supply Voltage (RL = 10k) 0 -20 SINK CURRENT (mA) -40 -60 -80 -100 -120 120 100 80 60 40 20 0 0 Figure 18. Sink Current vs. Output Voltage VS = 2.7 V VOUT REFERENCED TO V- (V) 0 1 2 3 4 5 SOURCE CURRENT (mA) VOUT REFERENCED TO V- (V) 0.5 1.0 1.5 2.0 VOUT REFERENCED TO V+ (V) 2.5 Figure 19. Sink Current vs. Output Voltage VS = 5.0 V http://onsemi.com 8 Figure 20. Source Current vs. Output Voltage VS = 2.7 V LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25C and VS = 5 V unless otherwise specified) 110 100 SOURCE CURRENT (mA) 90 80 70 60 50 40 30 20 10 0 0 1 2 3 4 VOUT REFERENCED TO V+ (V) 5 RL = 2 kW AV = 1 50 mV/div 2 ms/div Figure 21. Source Current vs. Output Voltage VS = 5.0 V RL = 1 MW AV = 1 50 mV/div 2 ms/div Figure 22. Settling Time vs. Capacitive Load 50 mV/div 2 ms/div Non-Inverting (G = +1) Input Output Figure 23. Settling Time vs. Capacitive Load Figure 24. Step Response - Small Signal 50 mV/div 2 ms/div 1 V/div 2 ms/div Inverting (G = -1) Input Non-Inverting (G = +1) Input Output Output Figure 25. Step Response - Small Signal Figure 26. Step Response - Large Signal http://onsemi.com 9 LMV321, LMV358, LMV324 TYPICAL CHARACTERISTICS (TA = 25C and VS = 5 V unless otherwise specified) 1 V/div 2 ms/div Inverting (G = -1) Input Output Figure 27. Step Response - Large Signal http://onsemi.com 10 LMV321, LMV358, LMV324 APPLICATIONS 50 k R1 5.0 k VCC R2 VCC - LMV321 MC1403 2.5 V + VO Vref 10 k - + VCC VO LMV321 1 V ref + V CC 2 R1 V O + 2.5 V(1 ) ) R2 R fO + R 1 2pRC C C For: fo = 1.0 kHz R = 16 kW C = 0.01 mF Figure 28. Voltage Reference Figure 29. Wien Bridge Oscillator VCC C R2 Hysteresis VOH Vref Vin R1 + LMV321 - VO VO Vin R1 C R3 - LMV321 + Vref CO VO CO = 10 C R2 VOL VinL Vref VinH Given: fo = center frequency A(fo) = gain at center frequency Choose value fo, C Q Then : R3 + pf O C R1 + R2 + R3 2 A(f O) R1 R3 4Q 2 R1 * R3 R1 (V OL * V ref) ) V ref R1 ) R2 R1 V inH + (V OH * V ref) ) V ref R1 ) R2 R1 H+ (V OH * V OL) R1 ) R2 V inL + Figure 30. Comparator with Hysteresis For less than 10% error from operational amplifier, ((QO fO)/BW) < 0.1 where fo and BW are expressed in Hz. If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 31. Multiple Feedback Bandpass Filter http://onsemi.com 11 LMV321, LMV358, LMV324 ORDERING INFORMATION Number of Channels Single Single Dual Dual Dual Quad Quad Order Number LMV321SQ3T2G LMV321SN3T1G* LMV358DMR2G LMV358MUTAG LMV358DR2G LMV324DR2G LMV324DTBR2G Specific Device Marking AAC 3AC V358 AC V358 LMV324 LMV 324 Package Type SC-70 (Pb-Free) TSOP-5 (Pb-Free) Micro8 (Pb-Free) UDFN8 (Pb-Free) SOIC-8 (Pb-Free) SOIC-14 (Pb-Free) TSSOP-14 (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel 4000 / Tape & Reel 3000 / Tape & Reel 2500 / Tape & Reel 2500 / Tape & Reel 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *Contact factory. http://onsemi.com 12 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS SC-88A, SOT-353, SC-70 CASE 419A-02 ISSUE J G A 5 4 S 1 2 3 -B- NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 D 5 PL 0.2 (0.008) M B M N J C DIM A B C D G H J K N S H K http://onsemi.com 13 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS TSOP-5 CASE 483-02 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00 NOTE 5 2X D 5X 0.20 C A B M 0.10 T 0.20 T L A 5 1 2 4 3 2X B S K DETAIL Z G DETAIL Z C 0.05 H T SEATING PLANE J SOLDERING FOOTPRINT* 0.95 0.037 1.9 0.074 2.4 0.094 1.0 0.039 0.7 0.028 mm inches SCALE 10:1 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 14 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS Micro8TM CASE 846A-02 ISSUE H D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. MILLIMETERS NOM MAX -- 1.10 0.08 0.15 0.33 0.40 0.18 0.23 3.00 3.10 3.00 3.10 0.65 BSC 0.40 0.55 0.70 4.75 4.90 5.05 MIN -- 0.05 0.25 0.13 2.90 2.90 INCHES NOM -- 0.003 0.013 0.007 0.118 0.118 0.026 BSC 0.016 0.021 0.187 0.193 MIN -- 0.002 0.010 0.005 0.114 0.114 HE E PIN 1 ID e b 8 PL 0.08 (0.003) M TB S A S -T- PLANE 0.038 (0.0015) A1 SEATING A c L DIM A A1 b c D E e L HE MAX 0.043 0.006 0.016 0.009 0.122 0.122 0.028 0.199 SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 8X 3.20 0.126 4.24 0.167 5.28 0.208 6X 0.65 0.0256 SCALE 8:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 15 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE AJ -X- A 8 5 B 1 S 4 0.25 (0.010) M Y M -Y- G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C -Z- H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) M J ZY S X S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 16 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS UDFN8 1.8x1.2, 0.4P CASE 517AJ-01 ISSUE O D 0.10 C PIN ONE REFERENCE AB L1 DETAIL A NOTE 5 E 0.10 C TOP VIEW (A3) A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30 mm FROM TERMINAL TIP. 4. MOLD FLASH ALLOWED ON TERMINALS ALONG EDGE OF PACKAGE. FLASH MAY NOT EXCEED 0.03 ONTO BOTTOM SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. DIM A A1 A3 b b2 D E e L L1 L2 MILLIMETERS MIN MAX 0.45 0.55 0.00 0.05 0.127 REF 0.15 0.25 0.30 REF 1.80 BSC 1.20 BSC 0.40 BSC 0.45 0.55 0.00 0.03 0.40 REF 0.05 C 0.05 C e/2 (b2) 1 4 (L2) 8 5 8X b 7X BOTTOM VIEW EE EE SIDE VIEW A1 C SEATING PLANE e DETAIL A 8X L MOUNTING FOOTPRINT* SOLDERMASK DEFINED 0.10 0.05 M M CAB C NOTE 3 0.22 0.66 8X 1.50 1 0.32 0.40 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 17 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS SOIC-14 CASE 751A-03 ISSUE J -A- 14 8 -B- P 7 PL 0.25 (0.010) M B M 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. G C -T- SEATING PLANE R X 45 _ F D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 SOLDERING FOOTPRINT 7X 7.04 1 0.58 14X 14X 1.52 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 18 LMV321, LMV358, LMV324 PACKAGE DIMENSIONS TSSOP-14 CASE 948G-01 ISSUE B M 14X K REF 0.10 (0.004) 0.15 (0.006) T U S TU S V S N 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B -U- N F DETAIL E K K1 J J1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 --- 1.20 --- 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_ 0.15 (0.006) T U S A -V- SECTION N-N -W- C 0.10 (0.004) -T- SEATING PLANE D G H DETAIL E SOLDERING FOOTPRINT* 7.06 1 0.36 14X 14X 1.26 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 19 EEE CCC EEE CCC 0.65 PITCH DIMENSIONS: MILLIMETERS LMV321, LMV358, LMV324 Micro8 is a trademark of International Rectifier. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 20 LMV321/D |
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